atomicbitops_arm64.s raw

   1  // Copyright 2019 The gVisor Authors.
   2  //
   3  // Licensed under the Apache License, Version 2.0 (the "License");
   4  // you may not use this file except in compliance with the License.
   5  // You may obtain a copy of the License at
   6  //
   7  //     http://www.apache.org/licenses/LICENSE-2.0
   8  //
   9  // Unless required by applicable law or agreed to in writing, software
  10  // distributed under the License is distributed on an "AS IS" BASIS,
  11  // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12  // See the License for the specific language governing permissions and
  13  // limitations under the License.
  14  
  15  // +build arm64
  16  
  17  #include "textflag.h"
  18  
  19  TEXT ·andUint32(SB),NOSPLIT,$0-12
  20    MOVD    addr+0(FP), R0
  21    MOVW    val+8(FP), R1
  22    MOVBU   ·arm64HasATOMICS(SB), R4
  23    CBZ     R4, load_store_loop
  24    MVN     R1, R2
  25    LDCLRALW    R2, (R0), R3
  26    RET
  27  load_store_loop:
  28    LDAXRW  (R0), R2
  29    ANDW    R1, R2
  30    STLXRW  R2, (R0), R3
  31    CBNZ    R3, load_store_loop
  32    RET
  33  
  34  TEXT ·orUint32(SB),NOSPLIT,$0-12
  35    MOVD    addr+0(FP), R0
  36    MOVW    val+8(FP), R1
  37    MOVBU   ·arm64HasATOMICS(SB), R4
  38    CBZ     R4, load_store_loop
  39    LDORALW R1, (R0), R2
  40    RET
  41  load_store_loop:
  42    LDAXRW  (R0), R2
  43    ORRW    R1, R2
  44    STLXRW  R2, (R0), R3
  45    CBNZ    R3, load_store_loop
  46    RET
  47  
  48  TEXT ·xorUint32(SB),NOSPLIT,$0-12
  49    MOVD    addr+0(FP), R0
  50    MOVW    val+8(FP), R1
  51    MOVBU   ·arm64HasATOMICS(SB), R4
  52    CBZ     R4, load_store_loop
  53    LDEORALW    R1, (R0), R2
  54    RET
  55  load_store_loop:
  56    LDAXRW  (R0), R2
  57    EORW    R1, R2
  58    STLXRW  R2, (R0), R3
  59    CBNZ    R3, load_store_loop
  60    RET
  61  
  62  TEXT ·compareAndSwapUint32(SB),NOSPLIT,$0-20
  63    MOVD    addr+0(FP), R0
  64    MOVW    old+8(FP), R1
  65    MOVW    new+12(FP), R2
  66    MOVBU   ·arm64HasATOMICS(SB), R4
  67    CBZ     R4, load_store_loop
  68    CASALW  R1, (R0), R2
  69    MOVW    R1, ret+16(FP)
  70    RET
  71  load_store_loop:
  72    LDAXRW  (R0), R3
  73    CMPW    R1, R3
  74    BNE     ok
  75    STLXRW  R2, (R0), R4
  76    CBNZ    R4, load_store_loop
  77  ok:
  78    MOVW    R3, ret+16(FP)
  79    RET
  80  
  81  TEXT ·andUint64(SB),NOSPLIT,$0-16
  82    MOVD    addr+0(FP), R0
  83    MOVD    val+8(FP), R1
  84    MOVBU   ·arm64HasATOMICS(SB), R4
  85    CBZ     R4, load_store_loop
  86    MVN     R1, R2
  87    LDCLRALD    R2, (R0), R3
  88    RET
  89  load_store_loop:
  90    LDAXR   (R0), R2
  91    AND     R1, R2
  92    STLXR   R2, (R0), R3
  93    CBNZ    R3, load_store_loop
  94    RET
  95  
  96  TEXT ·orUint64(SB),NOSPLIT,$0-16
  97    MOVD    addr+0(FP), R0
  98    MOVD    val+8(FP), R1
  99    MOVBU   ·arm64HasATOMICS(SB), R4
 100    CBZ     R4, load_store_loop
 101    LDORALD R1, (R0), R2
 102    RET
 103  load_store_loop:
 104    LDAXR   (R0), R2
 105    ORR     R1, R2
 106    STLXR   R2, (R0), R3
 107    CBNZ    R3, load_store_loop
 108    RET
 109  
 110  TEXT ·xorUint64(SB),NOSPLIT,$0-16
 111    MOVD    addr+0(FP), R0
 112    MOVD    val+8(FP), R1
 113    MOVBU   ·arm64HasATOMICS(SB), R4
 114    CBZ     R4, load_store_loop
 115    LDEORALD    R1, (R0), R2
 116    RET
 117  load_store_loop:
 118    LDAXR   (R0), R2
 119    EOR     R1, R2
 120    STLXR   R2, (R0), R3
 121    CBNZ    R3, load_store_loop
 122    RET
 123  
 124  TEXT ·compareAndSwapUint64(SB),NOSPLIT,$0-32
 125    MOVD    addr+0(FP), R0
 126    MOVD    old+8(FP), R1
 127    MOVD    new+16(FP), R2
 128    MOVBU   ·arm64HasATOMICS(SB), R4
 129    CBZ     R4, load_store_loop
 130    CASALD  R1, (R0), R2
 131    MOVD    R1, ret+24(FP)
 132    RET
 133  load_store_loop:
 134    LDAXR   (R0), R3
 135    CMP     R1, R3
 136    BNE     ok
 137    STLXR   R2, (R0), R4
 138    CBNZ    R4, load_store_loop
 139  ok:
 140    MOVD    R3, ret+24(FP)
 141    RET
 142