atomic_arch.h raw

   1  #define a_ll a_ll
   2  static inline int a_ll(volatile int *p)
   3  {
   4  	int v;
   5  	__asm__ __volatile__ ("ldaxr %w0,%1" : "=r"(v) : "Q"(*p));
   6  	return v;
   7  }
   8  
   9  #define a_sc a_sc
  10  static inline int a_sc(volatile int *p, int v)
  11  {
  12  	int r;
  13  	__asm__ __volatile__ ("stlxr %w0,%w2,%1" : "=&r"(r), "=Q"(*p) : "r"(v) : "memory");
  14  	return !r;
  15  }
  16  
  17  #define a_barrier a_barrier
  18  static inline void a_barrier()
  19  {
  20  	__asm__ __volatile__ ("dmb ish" : : : "memory");
  21  }
  22  
  23  #define a_cas a_cas
  24  static inline int a_cas(volatile int *p, int t, int s)
  25  {
  26  	int old;
  27  	do {
  28  		old = a_ll(p);
  29  		if (old != t) {
  30  			a_barrier();
  31  			break;
  32  		}
  33  	} while (!a_sc(p, s));
  34  	return old;
  35  }
  36  
  37  #define a_ll_p a_ll_p
  38  static inline void *a_ll_p(volatile void *p)
  39  {
  40  	void *v;
  41  	__asm__ __volatile__ ("ldaxr %0, %1" : "=r"(v) : "Q"(*(void *volatile *)p));
  42  	return v;
  43  }
  44  
  45  #define a_sc_p a_sc_p
  46  static inline int a_sc_p(volatile int *p, void *v)
  47  {
  48  	int r;
  49  	__asm__ __volatile__ ("stlxr %w0,%2,%1" : "=&r"(r), "=Q"(*(void *volatile *)p) : "r"(v) : "memory");
  50  	return !r;
  51  }
  52  
  53  #define a_cas_p a_cas_p
  54  static inline void *a_cas_p(volatile void *p, void *t, void *s)
  55  {
  56  	void *old;
  57  	do {
  58  		old = a_ll_p(p);
  59  		if (old != t) {
  60  			a_barrier();
  61  			break;
  62  		}
  63  	} while (!a_sc_p(p, s));
  64  	return old;
  65  }
  66  
  67  #define a_ctz_64 a_ctz_64
  68  static inline int a_ctz_64(uint64_t x)
  69  {
  70  	__asm__(
  71  		"	rbit %0, %1\n"
  72  		"	clz %0, %0\n"
  73  		: "=r"(x) : "r"(x));
  74  	return x;
  75  }
  76  
  77  #define a_clz_64 a_clz_64
  78  static inline int a_clz_64(uint64_t x)
  79  {
  80  	__asm__("clz %0, %1" : "=r"(x) : "r"(x));
  81  	return x;
  82  }
  83