atomic_arch.h raw

   1  #if __mips_isa_rev < 6
   2  #define LLSC_M "m"
   3  #else
   4  #define LLSC_M "ZC"
   5  #endif
   6  
   7  #define a_ll a_ll
   8  static inline int a_ll(volatile int *p)
   9  {
  10  	int v;
  11  	__asm__ __volatile__ (
  12  		"ll %0, %1"
  13  		: "=r"(v) : LLSC_M(*p));
  14  	return v;
  15  }
  16  
  17  #define a_sc a_sc
  18  static inline int a_sc(volatile int *p, int v)
  19  {
  20  	int r;
  21  	__asm__ __volatile__ (
  22  		"sc %0, %1"
  23  		: "=r"(r), "="LLSC_M(*p) : "0"(v) : "memory");
  24  	return r;
  25  }
  26  
  27  #define a_ll_p a_ll_p
  28  static inline void *a_ll_p(volatile void *p)
  29  {
  30  	void *v;
  31  	__asm__ __volatile__ (
  32  		"lld %0, %1"
  33  		: "=r"(v) : LLSC_M(*(void *volatile *)p));
  34  	return v;
  35  }
  36  
  37  #define a_sc_p a_sc_p
  38  static inline int a_sc_p(volatile void *p, void *v)
  39  {
  40  	long r;
  41  	__asm__ __volatile__ (
  42  		"scd %0, %1"
  43  		: "=r"(r), "="LLSC_M(*(void *volatile *)p) : "0"(v) : "memory");
  44  	return r;
  45  }
  46  
  47  #define a_barrier a_barrier
  48  static inline void a_barrier()
  49  {
  50  	__asm__ __volatile__ ("sync" : : : "memory");
  51  }
  52  
  53  #define a_pre_llsc a_barrier
  54  #define a_post_llsc a_barrier
  55  
  56  #undef LLSC_M
  57