syscall_arch.h raw

   1  #define __SYSCALL_LL_E(x) (x)
   2  #define __SYSCALL_LL_O(x) (x)
   3  
   4  static inline long __syscall0(long n)
   5  {
   6  	register long r0 __asm__("r0") = n;
   7  	register long r3 __asm__("r3");
   8  	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
   9  	: "+r"(r0), "=r"(r3)
  10  	:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
  11  	return r3;
  12  }
  13  
  14  static inline long __syscall1(long n, long a)
  15  {
  16  	register long r0 __asm__("r0") = n;
  17  	register long r3 __asm__("r3") = a;
  18  	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
  19  	: "+r"(r0), "+r"(r3)
  20  	:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
  21  	return r3;
  22  }
  23  
  24  static inline long __syscall2(long n, long a, long b)
  25  {
  26  	register long r0 __asm__("r0") = n;
  27  	register long r3 __asm__("r3") = a;
  28  	register long r4 __asm__("r4") = b;
  29  	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
  30  	: "+r"(r0), "+r"(r3), "+r"(r4)
  31  	:: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
  32  	return r3;
  33  }
  34  
  35  static inline long __syscall3(long n, long a, long b, long c)
  36  {
  37  	register long r0 __asm__("r0") = n;
  38  	register long r3 __asm__("r3") = a;
  39  	register long r4 __asm__("r4") = b;
  40  	register long r5 __asm__("r5") = c;
  41  	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
  42  	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5)
  43  	:: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
  44  	return r3;
  45  }
  46  
  47  static inline long __syscall4(long n, long a, long b, long c, long d)
  48  {
  49  	register long r0 __asm__("r0") = n;
  50  	register long r3 __asm__("r3") = a;
  51  	register long r4 __asm__("r4") = b;
  52  	register long r5 __asm__("r5") = c;
  53  	register long r6 __asm__("r6") = d;
  54  	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
  55  	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6)
  56  	:: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12");
  57  	return r3;
  58  }
  59  
  60  static inline long __syscall5(long n, long a, long b, long c, long d, long e)
  61  {
  62  	register long r0 __asm__("r0") = n;
  63  	register long r3 __asm__("r3") = a;
  64  	register long r4 __asm__("r4") = b;
  65  	register long r5 __asm__("r5") = c;
  66  	register long r6 __asm__("r6") = d;
  67  	register long r7 __asm__("r7") = e;
  68  	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
  69  	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7)
  70  	:: "memory", "cr0", "r8", "r9", "r10", "r11", "r12");
  71  	return r3;
  72  }
  73  
  74  static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
  75  {
  76  	register long r0 __asm__("r0") = n;
  77  	register long r3 __asm__("r3") = a;
  78  	register long r4 __asm__("r4") = b;
  79  	register long r5 __asm__("r5") = c;
  80  	register long r6 __asm__("r6") = d;
  81  	register long r7 __asm__("r7") = e;
  82  	register long r8 __asm__("r8") = f;
  83  	__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
  84  	: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8)
  85  	:: "memory", "cr0", "r9", "r10", "r11", "r12");
  86  	return r3;
  87  }
  88  
  89  #define SO_RCVTIMEO_OLD  18
  90  #define SO_SNDTIMEO_OLD  19
  91