syscall_arch.h raw

   1  #define __SYSCALL_LL_E(x) \
   2  ((union { long long ll; long l[2]; }){ .ll = x }).l[0], \
   3  ((union { long long ll; long l[2]; }){ .ll = x }).l[1]
   4  #define __SYSCALL_LL_O(x) __SYSCALL_LL_E((x))
   5  #define __SYSCALL_LL_PRW(x) 0, __SYSCALL_LL_E((x))
   6  
   7  /* The extra OR instructions are to work around a hardware bug:
   8   * http://documentation.renesas.com/doc/products/mpumcu/tu/tnsh7456ae.pdf
   9   */
  10  #define __asm_syscall(trapno, ...) do {   \
  11  	__asm__ __volatile__ (                \
  12  		"trapa #31\n"            \
  13  		"or r0, r0\n"                     \
  14  		"or r0, r0\n"                     \
  15  		"or r0, r0\n"                     \
  16  		"or r0, r0\n"                     \
  17  		"or r0, r0\n"                     \
  18  	: "=r"(r0) : __VA_ARGS__ : "memory"); \
  19  	return r0;                            \
  20  	} while (0)
  21  
  22  static inline long __syscall0(long n)
  23  {
  24  	register long r3 __asm__("r3") = n;
  25  	register long r0 __asm__("r0");
  26  	__asm_syscall(16, "r"(r3));
  27  }
  28  
  29  static inline long __syscall1(long n, long a)
  30  {
  31  	register long r3 __asm__("r3") = n;
  32  	register long r4 __asm__("r4") = a;
  33  	register long r0 __asm__("r0");
  34  	__asm_syscall(17, "r"(r3), "r"(r4));
  35  }
  36  
  37  static inline long __syscall2(long n, long a, long b)
  38  {
  39  	register long r3 __asm__("r3") = n;
  40  	register long r4 __asm__("r4") = a;
  41  	register long r5 __asm__("r5") = b;
  42  	register long r0 __asm__("r0");
  43  	__asm_syscall(18, "r"(r3), "r"(r4), "r"(r5));
  44  }
  45  
  46  static inline long __syscall3(long n, long a, long b, long c)
  47  {
  48  	register long r3 __asm__("r3") = n;
  49  	register long r4 __asm__("r4") = a;
  50  	register long r5 __asm__("r5") = b;
  51  	register long r6 __asm__("r6") = c;
  52  	register long r0 __asm__("r0");
  53  	__asm_syscall(19, "r"(r3), "r"(r4), "r"(r5), "r"(r6));
  54  }
  55  
  56  static inline long __syscall4(long n, long a, long b, long c, long d)
  57  {
  58  	register long r3 __asm__("r3") = n;
  59  	register long r4 __asm__("r4") = a;
  60  	register long r5 __asm__("r5") = b;
  61  	register long r6 __asm__("r6") = c;
  62  	register long r7 __asm__("r7") = d;
  63  	register long r0 __asm__("r0");
  64  	__asm_syscall(20, "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7));
  65  }
  66  
  67  static inline long __syscall5(long n, long a, long b, long c, long d, long e)
  68  {
  69  	register long r3 __asm__("r3") = n;
  70  	register long r4 __asm__("r4") = a;
  71  	register long r5 __asm__("r5") = b;
  72  	register long r6 __asm__("r6") = c;
  73  	register long r7 __asm__("r7") = d;
  74  	register long r0 __asm__("r0") = e;
  75  	__asm_syscall(21, "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7), "0"(r0));
  76  }
  77  
  78  static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
  79  {
  80  	register long r3 __asm__("r3") = n;
  81  	register long r4 __asm__("r4") = a;
  82  	register long r5 __asm__("r5") = b;
  83  	register long r6 __asm__("r6") = c;
  84  	register long r7 __asm__("r7") = d;
  85  	register long r0 __asm__("r0") = e;
  86  	register long r1 __asm__("r1") = f;
  87  	__asm_syscall(22, "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7), "0"(r0), "r"(r1));
  88  }
  89  
  90  #define SYSCALL_IPC_BROKEN_MODE
  91  
  92  #define SIOCGSTAMP_OLD   (2U<<30 | 's'<<8 | 100 | 8<<16)
  93  #define SIOCGSTAMPNS_OLD (2U<<30 | 's'<<8 | 101 | 8<<16)
  94