cpu_arm.mx raw

   1  // Copyright 2017 The Go Authors. All rights reserved.
   2  // Use of this source code is governed by a BSD-style
   3  // license that can be found in the LICENSE file.
   4  
   5  package cpu
   6  
   7  const CacheLinePadSize = 32
   8  
   9  // arm doesn't have a 'cpuid' equivalent, so we rely on HWCAP/HWCAP2.
  10  // These are initialized by archauxv() and should not be changed after they are
  11  // initialized.
  12  var HWCap uint
  13  var HWCap2 uint
  14  var Platform []byte
  15  
  16  // HWCAP/HWCAP2 bits. These are exposed by Linux and FreeBSD.
  17  const (
  18  	hwcap_VFPv4 = 1 << 16
  19  	hwcap_IDIVA = 1 << 17
  20  	hwcap_LPAE  = 1 << 20
  21  )
  22  
  23  func doinit() {
  24  	options = []option{
  25  		{Name: "vfpv4", Feature: &ARM.HasVFPv4},
  26  		{Name: "idiva", Feature: &ARM.HasIDIVA},
  27  		{Name: "v7atomics", Feature: &ARM.HasV7Atomics},
  28  	}
  29  
  30  	// HWCAP feature bits
  31  	ARM.HasVFPv4 = isSet(HWCap, hwcap_VFPv4)
  32  	ARM.HasIDIVA = isSet(HWCap, hwcap_IDIVA)
  33  	// lpae is required to make the 64-bit instructions LDRD and STRD (and variants) atomic.
  34  	// See ARMv7 manual section B1.6.
  35  	// We also need at least a v7 chip, for the DMB instruction.
  36  	ARM.HasV7Atomics = isSet(HWCap, hwcap_LPAE) && isV7(Platform)
  37  }
  38  
  39  func isSet(hwc uint, value uint) bool {
  40  	return hwc&value != 0
  41  }
  42  
  43  func isV7(s []byte) bool {
  44  	if s == "aarch64" {
  45  		return true
  46  	}
  47  	return s >= "v7" // will be something like v5, v7, v8, v8l
  48  }
  49